Modern embedded systems, such as mobile phones and other portable electronic devices, typically include a host CPU which communicates with various clients, such as volatile random access memory devices and nonvolatile random access memory devices, through conventional multi-drop bus interfaces. Such clients typically require many address and control lines, thus requiring wide buses between the host CPU and the clients, and may each require different interface and control circuitry.
As such embedded systems are continuously miniaturized to meet consumer demand, however, the available space on the circuit boards used therein as well as the cost to provide pins for the address, control and data lines on the device packages is becoming critically limited. As a result of such space limitations, it has become difficult to enhance the performance of the clients without further widening the already wide buses between the host CPU and the clients. Moreover, an increase in bus width would require an increase in the pin counts of the host CPU and clients, thereby increasing costs. In addition, enhancing the performance of the clients by increasing data transfer rates between the host and the clients has also become difficult since the operation frequencies of conventional multi-drop bus interfaces are rapidly approaching their physical limits.